Microsemi Corporation Tech Lead Product Verification Engineer - 6238 in Sunnyvale, California
- Verify complex digital integrated circuits at the block, subsystem or device level ( 100K to 10M+ gates).
- Design and development of verification environment components using SystemVerilog and UVM.
- Read and understand architecture and functional specification of block and subsystems and create verification plan.
- Create efficient constrained random, directed and performance testcases.
- Work with verification lead/manager to execute verification plan to completion through coverage metrics.
- Ability to debug and root cause simulation failures and work with design and architecture team to ensure timely resolution.
- Ability to run gate level netlist simulations with or without timing and debug simulation failures.
- Support ASIC lab validation including recreating issues in simulation environment and work with design team to identify issues.
- Read and understand applicable communication protocol standards.
Verify Low Power functionality using UPF flow
BSEE (MSEE preferred)
- 10+ years of ASIC/SoC verification experience
- Excellent scripting and programming skills.
- Experience using Verilog/SV/UVM is required.
- Working knowledge with Verification tools such as Cadence NC-Sim, waveform viewers, and other similar tools.
- Working knowledge of ASIC/SoC design verification and flows.
- Protocol knowledge and experience in PCI-Express, DDR, or ONFI/Toggle NAND flash will be an asset
- Excellent analytical and debugging skills and ability to proactively solve issues.
- Excellent teamwork and time management skills and the ability to work under pressure.
- Proven ability to learn and adapt to new methodologies and technologies.
- Excellent verbal and written communication skills.
Equal Opportunity Employer Minorities/Women/Protected Veterans/Disabled